The semiconductor integrated circuit (IC) industry has experienced exponential growth over the last few decades. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. One advancement implemented as technology nodes shrink, in some IC designs, has been the replacement of the typically polysilicon gate electrode with a metal gate electrode to improve device performance with the decreased feature sizes.
Super-flash technology has enabled designers to create cost effective and high performance programmable SOC (system on chip) solutions through the use of split-gate flash memory cells. The aggressive scaling of the third generation embedded super-flash memory (ESF3) enables designing flash memories with very high memory array density.